alexforencich / verilog-wishbone

Verilog wishbone components

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

grant_valid is undefined in module wb_arbiter_2

zzsczz opened this issue · comments

commented

compile failed as :

Error: D:/ws4modelsim/AXI_STUFF/verilog-wishbone-master/rtl/wb_arbiter_2.v(94): (vlog-2730) Undefined variable: 'grant_valid'.