ABHISHEK ANAND (ad-astra-et-ultra)

ad-astra-et-ultra

Geek Repo

Company:National Institute of Technology Durgapur

Location:West Bengal, India

Github PK Tool:Github PK Tool

ABHISHEK ANAND's repositories

OTFS-and-OFDM-Transceivers

Implementation of OFDM and OTFS transceivers on GNU Radio (software defined radio or SDR)

Language:PythonLicense:Apache-2.0Stargazers:23Issues:2Issues:2

RISC-V-CPU-Core

A single cycle MIPS RISC-V CPU Core using Verilog

Language:VerilogLicense:Apache-2.0Stargazers:6Issues:1Issues:0

RiscV-core-with-Approximate-Arithmetic-Circuits

GeAr low latency adder implementation and error analysis

Language:VerilogLicense:Apache-2.0Stargazers:4Issues:1Issues:1

A.M.-and-F.M-Transceivers

Implementation of A.M. and F.M. Transceivers on a SDR (software defined radio)

Language:PythonLicense:MITStargazers:2Issues:2Issues:0

Drone-Flight-controller-PCB

NodeMCU based flight controller PCB for a drone.

License:Apache-2.0Stargazers:1Issues:0Issues:0
Language:Jupyter NotebookLicense:Apache-2.0Stargazers:1Issues:0Issues:0

Microcontroller-PCB

A general-purpose microcontroller PCB design for various applications.

License:Apache-2.0Stargazers:1Issues:0Issues:0

R.F.-Transceiver-PCB

STM32 based radio-frequency transceiver PCB for IoT applications on KiCad

License:MITStargazers:1Issues:1Issues:0

f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Language:Jupyter NotebookLicense:ISCStargazers:0Issues:0Issues:0

f4pga-xc-fasm2bels

Library to convert a FASM file into BELs importable into Vivado.

Language:VerilogLicense:Apache-2.0Stargazers:0Issues:0Issues:0

prjxray

Documenting the Xilinx 7-series bit-stream format.

Language:PythonLicense:ISCStargazers:0Issues:0Issues:0