Tsukasa OI's repositories
collect_slice
Collect an iterator into a slice.
ImHex
🔍 A Hex Editor for Reverse Engineers, Programmers and people who value their retinas when working at 3 AM.
nugine-simd
SIMD-accelerated operations
riscv-binutils-devmemo
binutils development memo (for RISC-V)
riscv-c-api-doc
Documentation of the RISC-V C API
riscv-cfi
This repo holds the work area and revisions of the RISC-V CFI (Shadow Stack and Landing Pads) specifications. CFI defines the privileged and unprivileged ISA extensions that can be used by privileged and unprivileged programs to protect the integrity of their control-flow.
riscv-control-transfer-records
This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usages associated with profiling and debug.
riscv-crypto
RISC-V cryptography extensions standardisation work.
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
riscv-indirect-csr-access
Smcsrind/Sscsrind is an ISA extension that extends the indirect CSR access mechanism originally defined as part of the Smaia/Ssaia extensions, in order to make it available for use by other extensions without creating an unnecessary dependence on Smaia/Ssaia.
riscv-isa-manual
RISC-V Instruction Set Manual
riscv-isa-sim
Spike, a RISC-V ISA Simulator
riscv-opcodes
RISC-V Opcodes
riscv-profiles
RISC-V Architecture Profiles
riscv-rvm-csi
RVM-CSI (RISC-V eMbedded - Common Software Interface) aims to provide a source-level portability layer providing a simplified transition path between different microcontrollers based on RISC-V. This repo contains the specification documentation, and language-specific source files for implementing the API (initially, C header files).
riscv-sbi-doc
Documentation for the RISC-V Supervisor Binary Interface
riscv-smcdeleg-ssccfg
Supervisor Counter Delegation Architecture Extension
riscv-smcntrpmf
Cycle & Instret Privilege Mode Filtering Architecture Extension
riscv-smmtt
This specification will define the Smmtt privilege ISA extensions required to support the supervisor domain isolation for many isolation use cases e.g. confidential-computing, fault isolation and so on.
riscv-v-spec
Working draft of the proposed RISC-V V vector extension
riscv-zabha
The Zabha extension provides support for byte and halfword atomic memory operations.
riscv-zacas
riscv-zacas created from docs-spec-template template
tg-nexus-trace
RISC-V Nexus Trace TG documentation and reference code