Miao (ZPNMiaoHeng)

ZPNMiaoHeng

Geek Repo

Company:QUST

Location:China

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Miao's starred repositories

alacritty

A cross-platform, OpenGL terminal emulator.

Language:RustLicense:Apache-2.0Stargazers:54867Issues:452Issues:5713

grok-1

Grok open release

Language:PythonLicense:Apache-2.0Stargazers:49204Issues:561Issues:202

tmux

tmux source code

Language:CLicense:NOASSERTIONStargazers:33949Issues:426Issues:3373

coc.nvim

Nodejs extension host for vim & neovim, load extensions like VSCode and host language servers.

Language:TypeScriptLicense:NOASSERTIONStargazers:24184Issues:125Issues:3362

llm.c

LLM training in simple, raw C/CUDA

Language:CudaLicense:MITStargazers:22279Issues:219Issues:125

aider

aider is AI pair programming in your terminal

Language:PythonLicense:Apache-2.0Stargazers:14470Issues:125Issues:767

reference

为开发人员分享快速参考备忘清单(速查表)

Language:DockerfileLicense:MITStargazers:11502Issues:69Issues:241

tiny-gpu

A minimal GPU design in Verilog to learn how GPUs work from the ground up

Language:SystemVerilogStargazers:6738Issues:65Issues:22

XiangShan

Open-source high-performance RISC-V processor

Language:ScalaLicense:NOASSERTIONStargazers:4507Issues:93Issues:359

e200_opensource

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

Language:VerilogLicense:Apache-2.0Stargazers:2574Issues:229Issues:43

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

Language:AssemblyLicense:MITStargazers:2355Issues:100Issues:323

nvim

The Ultimate NeoVim Config for Colemak Users

CPP

Lecture notes, projects and other materials for Course 'CS205 C/C++ Program Design' at Southern University of Science and Technology.

zsh4humans

A turnkey configuration for Zsh

rCore-Tutorial-v3

Let's write an OS which can run on RISC-V in Rust from scratch!

Language:RustLicense:GPL-3.0Stargazers:1542Issues:21Issues:80

gem5

The official repository for the gem5 computer-system architecture simulator.

Language:C++License:BSD-3-ClauseStargazers:1533Issues:69Issues:276

neorv32

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Language:VHDLLicense:BSD-3-ClauseStargazers:1508Issues:51Issues:183

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

Language:SystemVerilogLicense:Apache-2.0Stargazers:1307Issues:96Issues:820

riscv

RISC-V CPU Core (RV32IM)

Language:VerilogLicense:BSD-3-ClauseStargazers:1159Issues:50Issues:18

biriscv

32-bit Superscalar RISC-V CPU

Language:VerilogLicense:Apache-2.0Stargazers:810Issues:29Issues:24

ventus-gpgpu

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

Language:ScalaLicense:NOASSERTIONStargazers:509Issues:13Issues:23

abstract-machine

A minimal, modularized, and machine-independent hardware abstraction layer

Language:CLicense:NOASSERTIONStargazers:416Issues:9Issues:2
Language:C++License:NOASSERTIONStargazers:276Issues:3Issues:3
Language:ScalaLicense:BSD-3-ClauseStargazers:198Issues:7Issues:2

Fuxi

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

Language:VerilogLicense:GPL-3.0Stargazers:156Issues:5Issues:2

advanced-computer-architecture

体系结构研讨 + ysyx高阶大纲 (WIP

License:CC-BY-SA-4.0Stargazers:89Issues:2Issues:2

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

Language:PythonLicense:BSD-2-ClauseStargazers:3Issues:2Issues:0

CPP

Lecture notes, projects and other materials for Course 'CS205 C/C++ Program Design' at Southern University of Science and Technology.

Language:C++Stargazers:1Issues:0Issues:0

NutShell

RISC-V SoC designed by students in UCAS

Language:ScalaLicense:NOASSERTIONStargazers:1Issues:0Issues:0