VeriDevOps / CompleteTest

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CompleteTest: Automatic Test Generation for Function Block Diagrams

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Documentation

Setup

Requirements

This tool is developed in Java and it requires java version 1.7 to be present on the system. You can always check the version of java you have installed from a command line by typing:

java -version

In addition, this tool is using Uppaal model checker, which has to be downloaded separately from www.uppaal.org.

Obtaining the binaries

Once you have downloaded both the CompleteTest and Uppaal, extract the completetest.zip archive and place verifyta.exe from Uppaal bin-Win32 folder to verifyta\bin-Win32 folder of CompleteTest.

After you have placed verifyta.exe to the correct folder, run the tool either by double-clicking on CompleteTest.jar or from a command line by typing:

java -jar CompleteTest.jar

Using the GUI

gui

1 – Step & Time

Step & Time columns are used to present to the user the number of test vectors needed for achieving the maximum coverage. Steps represent a cycle scan in FBDs while Time represent an external clock.

2 – Input values

Columns in this area are showing the values of input variables to a given FBD. These values are automatically generated by CompleteTest.

3 – Output values

Columns in this area by default showing false for Boolean variables and 0 for Numeric values. It is expected that a user will manually change those values to fit the expected behaviour of the system, based on the input values provided in the previous area.

4 – Achieved coverage

In this field CompleteTest is displaying the percentage of coverage items that are covered by the generated test inputs. It is important to note that the tool always provide the maximum achievable coverage value. This means that if we have a value of 80% this is the maximum that could be covered using the selected logic coverage. Most likely this is a sign of the dead code.

5 – Diagnostic information

In this field, a user is presented with diagnostic information regarding the state space that was explored and memory consumtion that was consumed during the model-checing execution.

6 – Validate Test Outputs

Once a user has provided expected values, it is possible to click on Validate Test Outputs in order to compare expected and the actual output vector for each test input vector.

Download CompleteTest

CompleteTest is an academic tool and it is currently in an early beta version. You can always grab the latest version here and use it freely, but only as part of your academic work.

Once you have downloaded both the CompleteTest and Uppaal, extract the completetest.zip archive and place verifyta.exe from Uppaal bin-Win32 folder to verifyta\bin-Win32 folder of CompleteTest.

After you have placed verifyta.exe to the correct folder, run the tool either by double-clicking on CompleteTest.jar or from a command line by typing:

java -jar CompleteTest.jar This tool is developed in Java and it requires java version 1.7 to be present on the system. You can always check the version of java you have installed from a command line by typing:

java -version

Publications Related to CompleteTest

Eduard Paul Enoiu, Daniel Sundmark, Adnan Causevic, Robert Feldt , Paul Pettersson, Mutation-Based Test Generation for PLC Embedded Software using Model Checking (Oct 2016) -- Best Paper Award-- The International Conference on Testing Software and Systems (ICTSS)

Enoiu, E. P., Causevic, A., Sundmark, D., & Pettersson, P. (2016). A Controlled Experiment in Testing of Safety-Critical Embedded Software. In IEEE International Conference on Software Testing, Verification and Validation.

Enoiu, E. P. (2014, October). Model Checking-Based Software Testing for Function Block Diagrams.

Enoiu, E. P., Causevic, A., Ostrand, T., Weyuker, E., Sundmark, D., & Pettersson, P. (2014). Automated Test Generation using Model-Checking: An Industrial Evaluation. International Journal On Software Tools For Technology Transfer, 1(1), 1—18.

Enoiu, E. P., Sundmark, D., & Pettersson, P. (2013). Using Logic Coverage to Improve Testing Function Block Diagrams. In A. U. Hüsnü Yenigün Cemal Yilmaz (Ed.), International Conference on Testing Software and Systems (1—16). Springer Berlin Heidelberg.

Enoiu, E. P., Doganay, K., Bohlin, M., Sundmark, D., & Pettersson, P. (2013). MOS: An Integrated Model-based and Search-based Testing Tool for Function Block Diagrams. In 35th International Conference on Software Engineering (ICSE) – First International Workshop on Combining Modelling and Search-Based Software Engineering. IEEE.

Enoiu, E. P., Sundmark, D., & Pettersson, P. (2013). Model-based Test Suite Generation for Function Block Diagrams using the UPPAAL Model Checker. In International Conference on Software Testing, Verification and Validation (ICST) – Advances in Model Based Testing (A-MOST 2012). IEEE.

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