Umer Shahid's repositories
beaglevv
beaglev
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
digilent-xdc
A collection of Master XDC files for Digilent FPGA and Zynq boards.
FP_Division
SystemVerilog based IEEE-754 Floating Point Division Algorithm which is direct translation of the C source file, part of the SoftFloat IEEE Floating-Point Arithmetic Package, Release 3d, by John R. Hauser.
FPU_Division
SystemVerilog based IEEE-754 Floating Point Division Algorithm. It is synthesizable functional block of FPU divide unit tested and verified on Mentor Questa 2021.3.
gem5
Fork of main gem5 repo: https://gem5.googlesource.com/public/gem5/
Introduction-to-SoC-Design-Education-Kit
Introduction to SoC Design Education Kit
Rapid-Embedded-Education-Kit
Rapid Embedded System Education kit
RISCV-Hackathon
Tools Installation guide for RISC-V Hackathon
riscv-isa-sim
Spike, a RISC-V ISA Simulator
riscv-validation
Scripts/tests/configurations needed for configuring a real RISC-V board in gem5 live here
simple-django-project
A simple Django project which uses MySQL as database. It has Signup, Login, Logout functionality. It lets you search for countries, cities, languages from the default mysql dump. Django's user table has been overridden to store user information.