Satvik Patel's starred repositories

SimpleCache

Simple cache design implementation in verilog

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QuadSPI

RTL development of Quad Serial Peripheral Interface (Quad-SPI) on QuestaSim using SystemVerilog.

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Introduction-to-Computer-Architecture-Education-Kit

Gain an understanding of the fundamental topics and concepts of computer architecture including the application of these with modern Arm processors

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VLSI-Fundamentals-Education-Kit

Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied in the design of simple logic circuits and in the physical implementation of a simplified microprocessor

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cython

The most widely used Python to C compiler

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darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

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rclone

"rsync for cloud storage" - Google Drive, S3, Dropbox, Backblaze B2, One Drive, Swift, Hubic, Wasabi, Google Cloud Storage, Azure Blob, Azure Files, Yandex Files

Language:GoLicense:MITStargazers:45764Issues:0Issues:0

Clipboard

😎🏖️🐬 Your new, 𝙧𝙞𝙙𝙤𝙣𝙠𝙪𝙡𝙞𝙘𝙞𝙤𝙪𝙨𝙡𝙮 smart clipboard manager

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tinysys

A tiny system built on a small QMTECH board

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PipelineC

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

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neorv32

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

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FIFO-BIST

Final project for the class "Application Specific Integrated Circuit Development"

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FPGA-Devcloud

Get started using Intel® FPGA tools on the Devcloud with tutorials, workshops, advanced courses, and sample projects built specifically for students, researchers, and developers. Visit our official Intel® FPGA Devcloud website:

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Inverter-design-and-analysis-using-sky130pdk

Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools

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Vitis-Tutorials

Vitis In-Depth Tutorials

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superscalar

Superscalar version of IITB pipeline RISC

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sbc-reviews

Jeff Geerling's SBC review data - Raspberry Pi, Radxa, Orange Pi, etc.

License:MITStargazers:429Issues:0Issues:0

Floating-Point-ALU-in-Verilog

32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.

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cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

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Superscalar_Pipeline_Processor

Design consists of a 32-bit MIPS superscalar pipeline processor in functional Verilog. Runs a cache based memory system, a branch predictor, and a 2-way superscalar pipeline processor issuing two instructions at a time. Intended for creators Yiming Gan and Dylan Vanmali.

Language:VerilogLicense:Apache-2.0Stargazers:12Issues:0Issues:0

Operating-Systems-Foundations-with-Linux-on-the-Raspberry-Pi

A textbook on the introduction to the foundations of modern operating systems with Linux

License:NOASSERTIONStargazers:24Issues:0Issues:0

verilog-pcie

Verilog PCI express components

Language:VerilogLicense:MITStargazers:1053Issues:0Issues:0

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

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sv-tutorial

SystemVerilog Tutorial

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GPU-Guide

Graphics Processing Unit (GPU) Architecture Guide

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