Priyanshu Mishra's repositories
accel-sim-framework
This is the top-level repository for the Accel-Sim framework.
akita-coa-simulator
A flexible, high-performance, user-friendly computer architecture simulator engine
AMD-HIP-ROCm
HIP: C++ Heterogeneous-Compute Interface for Portability
ChiselAIA-riscv-AIA
RISC-V AIA in Chisel
cuda-samples
Samples for CUDA Developers which demonstrates features in CUDA Toolkit
difftest-risc-v
Modern co-simulation framework for RISC-V CPUs
hdl-registers
An open-source HDL register code generator fast enough to run in real time.
HuanCun
Open-source high-performance non-blocking cache
LLMs-from-scratch-chatgpt
Implement a ChatGPT-like LLM in PyTorch from scratch, step by step
oak-for-distributed-systems
Meaningful control of data in distributed systems.
perf-book-modern-CPUs
The book "Performance Analysis and Tuning on Modern CPU"
pyspur
AI Agent Builder in Python
qflex-epfl-computer-arch-sim
Quick & Flexible Rack-Scale Computer Architecture Simulator
Risc-v-operating-system-in-1000-lines
Writing an OS in 1,000 lines.
TestRIG-processor-verification-riscv
Testing processors with Random Instruction Generation
this-week-in-rust
Data for this-week-in-rust.org
tt10-wildcat
The Wildcat RISC-V
tvm-dl-stack-for-cpu-gpu-accelerators
Open deep learning compiler stack for cpu, gpu and specialized accelerators
unikraft
A next-generation cloud native kernel designed to unlock best-in-class performance, security primitives and efficiency savings.
ventus-gpgpu
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
veryl-modern-hdl
Veryl: A Modern Hardware Description Language
XiangShan-high-performance-risc-v-processor
Open-source high-performance RISC-V processor