PacoReinaCampo

Francisco Javier Reina Campo's repositories

MPSoC-DV

Multi-Processor System on Chip verified with UVM/OSVVM/FV

Language:SystemVerilogMIT25 40

SoC-DV

System on Chip verified with UVM/OSVVM/FV

Language:SystemVerilogMIT21 30

PU-RISCV

Processing Unit with RISCV-32 / RISCV-64 / RISCV-128

Language:SystemVerilogMIT18 20

SoC-RISCV

System on Chip with RISCV-32 / RISCV-64 / RISCV-128

Language:SystemVerilogMIT17 40

MPSoC-NTM

Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV

Language:SystemVerilogMIT12 30

vhdl2verilog

Hardware Description Language Translator

Language:SystemVerilogMIT12 40

verilog2vhdl

Hardware Description Language Translator

Language:SystemVerilogMIT10 4 1

MPSoC-RISCV

Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128

Language:SystemVerilogMIT9 20

UVM

Standard Universal Verification Methodology

Language:SystemVerilogApache-2.08 20

SoC-FinTech

Financial Technology with SoC-NTM verified with UVM/OSVVM/FV

Language:SystemVerilogMIT7 20

SoC-NTM

Neural Turing Machine for a System on Chip verified with UVM/OSVVM/FV

Language:SystemVerilogMIT5 20

PU-DV

Processing Unit verified with UVM/OSVVM/FV

Language:SystemVerilogMIT4 30

PU-NTM

Neural Turing Machine for a Processing Unit verified with UVM/OSVVM/FV

Language:SystemVerilogMIT4 30

SoC-MSP430

System on Chip with MSP430-16

Language:SystemVerilogMIT4 20

OpenNN

Open Neural Network

Language:SystemVerilogLGPL-3.03 30

gnudebian

Distribution for RTOS

Language:SystemVerilogMIT2 20

MPSoC-FinTech

Financial Technology with MPSoC-NTM verified with UVM/OSVVM/FV

Language:SystemVerilogMIT2 20

MPSoC-OR1K

Multi-Processor System on Chip with OpenRISC-32 / OpenRISC-64

Language:SystemVerilogMIT2 20

MPSoC-RTOS

Distribution for a MPSoC

Language:SystemVerilogMIT2 30

PU-OR1K

Processing Unit with OpenRISC-32 / OpenRISC-64

Language:SystemVerilogMIT2 30

SoC-RTOS

Operating System for a System on Chip

Language:SystemVerilogMIT2 20

MPSoC-MSP430

Multi-Processor System on Chip with MSP430-16

Language:SystemVerilogMIT1 20

PU-MSP430

Processing Unit with MSP430-16

Language:SystemVerilogMIT1 20

SoC-OR1K

System on Chip with OpenRISC-32 / OpenRISC-64

Language:SystemVerilogMIT1 20

gnuhurd

Operating System for RTOS

Language:SystemVerilogMIT020

gnumach

Kernel for RTOS

Language:SystemVerilogMIT020

gnumig

Kernel Interface Generator for RTOS

Language:SystemVerilogMIT020

OSVVM

Open Source VHDL Verification Methodology

Language:SystemVerilogNOASSERTION030

PU-FinTech

Financial Technology with PU-NTM verified with UVM/OSVVM/FV

Language:SystemVerilogMIT000

PU-RTOS

Kernel for a Processing Unit

Language:SystemVerilogMIT020