Nickolay's repositories

schoolRISCV_ICache

Академический проект для исследования прироста производительности процессора в зависимости от конфигурации Иерархии Памяти

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awesome-sky130

A curated list of awesome resources for sky130

Altera-Cyclone-IV-board-V3.0

Documentation for Chinese ALTERA Cyclone IV EP4CE6 FPGA Development Board

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awesome-canbus

:articulated_lorry: A curated list of awesome CAN bus tools, hardware and resources

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awesome-latticeFPGAs

:book: List of FPGA Lattice boards using open tools

DDLM

Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

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fpga_101

FPGA 101 lessons/labs

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riscv

RISC-V CPU Core (RV32IM)

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scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

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mdu

M-extension for RISC-V cores.

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schoolRISCV

CPU microarchitecture, step by step

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SimpleCacheController

Advanced Material: Implementing Cache Controllers

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basic_verilog

Must-have verilog systemverilog modules

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caravel

Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

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chiselv

A RISC-V Core (RV32I) written in Chisel HDL

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DCcontroller

Программное управление блоком питания Agilent E3648A. C#

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fpga.play.pub

Low cost open source Lattice iCE40UP5k FPGA board.

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hdl

HDL libraries and projects

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library_ieee_754_hp_arithmetic

Computer Arithmetics: A library of modules for half-precision floating point arithmetic

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open-fpga-verilog-tutorial

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

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riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

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skywater-pdk

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

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spau

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

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wb2axip

Bus bridges and other odds and ends

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