Usatyuk Vasiliy's repositories
Density-Evolution-AWGN
Density evolution for LDPC codes construction under AWGN-channel: reciprocal-channel approximation (RCA), Gaussian Evolution, Covariance Evolution
trapping-sets-enumeration
Importance Sampling and Linear Programming based Enumerating and Weighing of Trapping sets in LDPC codes, ISING models and related DNN Arch( Transformer, RBM, BM, SPN und etc),
classic-PEG-
Progressive edge growth PEG for LDPC code and QC-LDPC construction C++, Python, Matlab PEG with ACE and Avoiding Generating Small Cycles
EMD-Spectrum-LDPC
Enumerate LDPC Codes extrinsic message degree (EMD) Spectrum for analyzing cycles properties sublinear and part of linear trapping sets
floor-scale-modular-lifting
Floor-Scale Modular lifting of MET-LDPC with ACE and Upper Bound on Code distance Constrains (Mackay-Vontobel-Smarandache-Siegel-Butler bound)
Classical-and-Quantum-Topology-ML-toric-spherical
Spherical and Hyperbolic Toric Topology-Based Codes On Graph Embedding for Ising MRF Models: Classical and Quantum Topology Machine Learning
Clock-Domain-Crossing-Synchronizers
Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference for understanding and implementing robust clock domain crossing solutions in digital systems.
Virtual-FPGA-Lab
This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.
basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
bigdl-llm-tutorial
Accelerate LLM with low-bit (FP4 / INT4 / FP8 / INT8) optimizations using bigdl-llm
Custom_Part_Data_Files
Xilinx PCIe to MIG DDR4 example designs and custom part data files
dory
A tool to deploy Deep Neural Networks on PULP-based SoC's
DVB-S2-matrices
matlab tools to convert matrices defined in DVB-S2 standard to parity-check to Quasi-Cyclic matrices
ESP-12-ESP8266-_Server-Room-Dweet-based-Sensors-Tracker-Temp-Humidity-Tracker-
Server-Room-ESP12(ESP8266)_Dweet-based-Sensors-Tracker-Temp-Humidity-Tracker
fpga-snntorch
Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.
gpqa
GPQA: A Graduate-Level Google-Proof Q&A Benchmark
llm.c
LLM training in simple, raw C/CUDA
mod-interleaveavx_multithreads-FAID
Source codes for the paper "Optimized LNS-FAID of LDPC Codes: A Hybrid Precision Decoding Approach for 50G-PON".
neureka
2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters
parametrizable-floating-point-verilog
Verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent
pykan
Kolmogorov Arnold Networks
RandomizedGreedyMPS
Code associated with the publication "Randomized greedy magic point selection schemes for nonlinear model reduction" by R. Zimmermann/Kai Cheng
Retrieval_Head
open-source code for paper: Retrieval Head Mechanistically Explains Long-Context Factuality
Server-Room-Dweet-based-Sensors-Tracker-Temp-Humidity-Tracker-
STM32F405RG based Server Room Dweet Temp Humidity Tracker
starlight
Starlight: A Kernel Optimizer for GPU Processing
Synology_enable_eunit
Enable an unsupported Expansion Unit
tiny-gpu
A minimal GPU design in Verilog to learn how GPUs work from the ground up
verilog-pcie
Verilog PCI express components
ZLUDA
CUDA on AMD GPUs