HHHHorrible

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

excalidraw

Virtual whiteboard for sketching hand-drawn like diagrams

nasti-ddrx-mc

NASTI slave compliant DDRx memory controller.

wav-lpddr-hw

Wavious DDR (WDDR) Physical interface (PHY) Hardware

SSRL_work

work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework

tvip-axi

AMBA AXI VIP

axi4_vip

Verification IP for APB protocol

GowinDDR3_AXI4_SpinalHDL

Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现

BPSK_ASIC

BPSK demodulator ASIC design with Toshiba 45nm lib in verilog for EE 287 Spring 2013

wb2axip

Bus bridges and other odds and ends

verilog-arbiter

A look ahead, round-robing parametrized arbiter written in Verilog.

wp-weixin

WordPress WeChat integration

FPGA-Application-Development-and-Simulation

《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).

MAML_Pytorch_RL

basic_verilog

Must-have verilog systemverilog modules

nysa-verilog

Verilog Repository for GIT

verilog-mersenne

Verilog implementation of Mersenne Twister PRNG

verilog-axi

Verilog AXI components for FPGA implementation

WantWords

An open-source online reverse dictionary.

pytorch-maml-rl

Reinforcement Learning with Model-Agnostic Meta-Learning in Pytorch

CommPy

Digital Communication with Python

reinforcement-learning

Implementation of Reinforcement Learning Algorithms. Python, OpenAI Gym, Tensorflow. Exercises and Solutions to accompany Sutton's Book and David Silver's course.

Awesome-Meta-Learning

A curated list of Meta Learning papers, code, books, blogs, videos, datasets and other resources.

learn2learn

A PyTorch Library for Meta-learning Research

XUAN

slidev

Presentation Slides for Developers

ChineseChess

Cross-platform and online battle platform game based on Qt: Chinese Chess. Also known as:『Xiangqi』『**象棋』

sata3_host_controller

It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.

markdown-weixin

一个在线将 Markdown 转换为微信公众帐号文章格式的工具

mmWave

Comparative analysis of mmWave channel models