FOREST-HE

Throughput-Maximization-in-Wireless-Powered-Communication-Networks

paper simulation "Throughput Maximization in Wireless Powered Communication Networks"

Energy-Efficient-Beamforming-Design-for-RIS-aided-MIMO-Downlink-Communication-with-SWIPT

BEamforming Design using OPtimization Techniques.

WSR_maximization_for_RIS_system

This repository contains the source codes for the paper ``Weighted Sum-Rate Maximization for Reconfigurable Intelligent Surface Aided Wireless Networks'' in IEEE Transactions on Wireless Communications.

AXI2APB-Bridge-Design-and-Verification

In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the preferred AXI bus will be axi4-lite and the APB bus will be APB3. You can find the more detailed information about the bridge protocol by looking at the AXI to APB Bridge LogiCORE IP Product Guide.

AXI-Ethernet-UVM

A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM

axi4_vip

Verification IP for APB protocol

AXI4_Interconnect

AXI总线连接器

wb2axip

Bus bridges and other odds and ends

AMBA_AXI_AHB_APB

AMBA bus lecture material

NandFlashController

AXI Interface Nand Flash Controller (Sync mode)

axi-uvm

yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/

amba3-vip

amba3 apb/axi vip

AXI

VIP for AXI Protocol

uvm_axi

uvm AXI BFM(bus functional model)

tvip-axi

AMBA AXI VIP

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

verilog-axi

Verilog AXI components for FPGA implementation

AHB-to-I2C

Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C master and I2c slave. The RTL and all the test benches are written in [VERILOG]

AHB-to-APB-Bridge-Verification

Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.

AHB2APB

AHB转APB的总线桥以及APB总线设计

ahb2apb-bridge

An uvm verification env for ahb2apb bridge

Verification-of-MCDF

design-and-verification-of-MCDF-phase3

design-and-verification-of-MCDF-phase3

mcdf

shiyan

MCDF

Multi-Channel Data Formatter, verilog

uvm-mcdf

Mirror of william_william/uvm-mcdf on Gitee

mcdf

rkv mcdf

MCDF

multi-channel data formatter

Verilog-Practice

HDLBits website practices & solutions

zipcpu

A small, light weight, RISC CPU soft core