Divyathali / FPGA-Routing-placement---Best-way

The published IEEE paper tells about the basic details of this project

FPGA Design and Developmnet

EFFICIENT FPGA DESIGN & DEVELOPMENT

1. System design
2. Algorithm design - (Advanced OOPS & DS)
3. Data management design - (DB & XML handling)
4. Training methodology
5. Testing methodology
6. Predictional modeling
7. System Report generation
8. Some ML/AI concepts used for functionality developments

SYSTEM REQUIREMENT

1. OS :- Linux Operating system
2. RAM :- 20 GB
3. Processor :- i7 10th Gen processor (quad/octa)
4. Hard disk :- 250 GB

TESTING

This methodology test involved in : Small,Medium and Large Scale Applications. The results also denoted in the PAPER.

Algorithm uses: All the OOPS and Data structures concepts were Used in this projects. for the example,

• Heap queue
• Memeory handling algorithm
• Garbage collection algorthm
• Shortest path algorthms- 4 Algorithm
• Merge sort - 1 algorthm
• RRG graph algorithm
• Clustering algorithm
• Swithcing pattern algorithm
• Swithcing matrix algorithm
• Uni/Bi directional algorithm
• Combination logic block creation
• Combination logic block modifiaction
• Combination logic block configuration
• CLB to cluster configuration
• Linked list with Queue
• Confussion matrix algorithm
• Dynamic memory handling algorithm
• Dynamic programming
• Thread handling
• Node handling
• Connection handling
• Parallelism
• Dynamic table updation

etc..,

Note: In this image folder - model images were given. Not the implemented images were given.