Chun-Feng / CACTI-6.5

This tools offer many simulation of memory design detail parameter. Then you can setting these parameter to running result in your condition circumstance.

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CACTI-6.5

This tools offer many simulation of memory design detail parameter. Then you can setting these parameter to running result in your condition circumstance.

CACTI is an analytical tool that takes a set of cache/memory para- meters as input and calculates its access time, power, cycle time, and area. CACTI was originally developed by Dr. Jouppi and Dr. Wilton in 1993 and since then it has undergone five major revisions.

List of features (version 1-6.5):

The following is the list of features supported by the tool.

  • Power, delay, area, and cycle time model for direct mapped caches set-associative caches fully associative caches Embedded DRAM memories Commodity DRAM memories

  • Support for modeling multi-ported uniform cache access (UCA) and multi-banked, multi-ported non-uniform cache access (NUCA).

  • Leakage power calculation that also considers the operating temperature of the cache.

  • Router power model.

  • Interconnect model with different delay, power, and area properties including low-swing wire model.

  • An interface to perform trade-off analysis involving power, delay, area, and bandwidth.

  • All process specific values used by the tool are obtained from ITRS and currently, the tool supports 90nm, 65nm, 45nm, and 32nm technology nodes.

    Version 6.5 has a new c++ code base and includes numerous bug fixes. CACTI 5.3 and 6.0 activate an entire row of mats to read/write a single block of data. This technique improves reliability at the cost of
    power. CACTI 6.5 activates minimum number of mats just enough to retrieve a block to minimize power.

How to use the tool?

Prior versions of CACTI take input parameters such as cache size and technology node as a set of command line arguments. To avoid a long list of command line arguments, CACTI 6.5 lets users specify their cache model in a more detailed manner by using a config file (cache.cfg).

-> define the cache model using cache.cfg -> run the "cacti" binary <./cacti -infile cache.cfg>

For complete documentation of the tool, please refer CACTI-5.3 and 6.0 technical reports and the following paper, "Optimizing NUCA Organizations and Wiring Alternatives for Large Caches With CACTI 6.0", that appears in MICRO 2007.

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This tools offer many simulation of memory design detail parameter. Then you can setting these parameter to running result in your condition circumstance.


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