Cal-Poly-RAMP / ramp-core

RAMP's out of order RV32G processor, implemented with PyMTL3

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LOGO Ramp Core

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RAMP's out-of-order RV32G processor core implemented with the PyMTL3 framework.

Repository working on Ubuntu, finnicky on Mac, untested on Windows.

Quickstart

Download Repo:
$ git clone https://github.com/Cal-Poly-RAMP/ramp-core

Install Requirements:
$ pip install -r requirements.txt

Install Verilator (Mac):
$ brew install verilator

Install Verilator (Ubuntu):
$ apt-get install verilator

Testing

Run test suite with pymtl:
$ make test or
$ pytest tests/*

Run test suite with verilator:
$ make test-verilog or
$ pytest tests/* --test-verilog

Synthesis

Compile PyMTL code into SystemVerilog, under translated/:
$ make synthesis or
$ python synthesis.py

Resources

Presentation
Architecture Diagram

About

RAMP's out of order RV32G processor, implemented with PyMTL3


Languages

Language:Python 35.6%Language:SystemVerilog 31.8%Language:Verilog 31.8%Language:Assembly 0.8%Language:Makefile 0.1%