努力养家的于好看's repositories
OpenSERDES
Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.
000
Analog-Design-of-1.9-GHz-PLL-system
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
Language:MATLAB000
BuckPSU
Arduino library for DC-DC converters with UARTs
Language:C++000
Digital-Calibration-of-SAR-ADC
Successive Approximation Register (SAR) ADC Digital Calibration (in Matlab)
Language:MATLAB000
Library-Actions
图书馆座位预约，适合于与类似西安建筑科技大学\中南大学\山东第一医科大学济南主校区\潍坊科技学院\北京理工大学\山东大学\复旦大学医科馆\池州学院\浙江师范大学\兰州大学\山东青年政治学院\安徽农业大学\浙江中医药大学\河南大学\上海电机学院等相似的系统，如http://rg.lib.xauat.edu.cn/home/web/seat/area/1
Language:Python000
MATLAB_cadenceVirtuoso
Utilities for working with Cadence Virtuoso IC design software
Language:MATLAB000
VirtuosoToolboxMatlab
MATLAB toolbox for interfacing with the Cadence Virtuoso IC Design System
Language:MATLAB000