Arvind Srinivasan's repositories
Room-Counter
Our HackGT 2020 Project
Verilog-Projects
A variety of projects using FOSS Verilog tools for the Alchitry CU
Arvind-Srinivasan
GitHub Profile Repository
issuer-icons
Vector graphics of one-time password issuer logo's, used in Raivo OTP for iOS.
Language:PythonNOASSERTION000
keychain-pcb
GitHub repository for my entry to the RoboJackets Winter 2020 PCB Competition
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symbiflow-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Language:Jupyter NotebookISC000
symbiflow-examples
Example designs showing different ways to use SymbiFlow toolchains.
Language:VerilogISC000
yosys
SymbiFlow WIP changes for Yosys Open SYnthesis Suite
Language:C++ISC000