AbduJama / MIPS_CPU

MIPS CPU Implementation using VHDL

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MIPS_CPU

Built using VHDL in Intel's Altera Quartus Software and ModelSim was used for the Simulation.

The test program takes around 400 Cycles to hit SYSCALL and terminate.

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MIPS CPU Implementation using VHDL


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Language:VHDL 100.0%