Giters
ARM-software
/
CSAL
Coresight Access Library
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Stargazers:
109
Watchers:
13
Issues:
19
Forks:
42
ARM-software/CSAL Issues
Initializing a board without filesystem or a cs_device without board
Updated
6 months ago
Comments count
2
ETM TRCIDR1 register read throws error when access from Processor
Closed
6 months ago
Comments count
5
Tool for visualizing the traced debug data from the ETB.
Updated
7 months ago
Comments count
1
Cannot compile BAREMETAL target due to ERRDESC undefined
Closed
7 months ago
Comments count
4
Compiler warnings
Closed
7 months ago
Comments count
7
Storing ETM trace in persistent buffer.
Closed
7 months ago
Comments count
3
Building the library for Cortex-M
Closed
7 months ago
Comments count
3
reserved identifier violation
Closed
10 months ago
Comments count
5
Claim tags need clarification
Updated
a year ago
Comments count
1
CoreSight ETS support
Updated
2 years ago
CSAL vs Coresight driver in kernel
Closed
2 years ago
Comments count
1
Incorrect setting of the access type register
Closed
2 years ago
Comments count
1
Tags after v2.4 seem to be missing
Closed
2 years ago
Comments count
1
Support for Cavium ThunderX / ThunderX2 cores
Closed
2 years ago
Comments count
1
Support for Cortex-M33 which has ETMv4
Closed
2 years ago
Comments count
1
cs_pmu_bus_export should handle case where there is no bus
Closed
2 years ago
Comments count
1
CS_TMC_RWPHI is incorrect
Closed
2 years ago
Comments count
1
hikey960 got panic using csscan.py
Closed
5 years ago
ETR question
Updated
5 years ago