zhajio1988

YASA

:snail:Yet Another Simulation Architecture

Open_RegModel

:hatched_chick:Use ORDT and systemRDL tools to generate C/Verilog header files, register RTL, UVM register models, and docs from compiled SystemRDL.

ExtremeDV_UVM

UVM resource from github, run simulation use YASAsim flow

my_vimrc

:dragon_face:Jude's vimrc for DV work(fine tuning for SV/UVM)

uvm_candy_lover

:candy:UVM candy lover testbench which uses YASA as simulation script

YasaUvk

:bug:UVM verification kits which uses YASA as simulation script

RALBot-header

:beetle:Generate C/Verilog header file from compiled SystemRDL input

edalize

An abstraction library for interfacing EDA tools

fusesoc

FuseSoC is a package manager and a set of build tools for FPGA/ASIC development

second_edition

Code for the second edition of Advanced UVM.

sv_bfms

SystemVerilog BFMs with bindings for UVM, etc

vunit

VUnit is a unit testing framework for VHDL/SystemVerilog

yuu_register_productor

UVM register utility generation by inputting xls table

gitflow

Git extensions to provide high-level repository operations for Vincent Driessen's branching model.

gnu-eprog

Embedded Programming with the GNU Toolchain

honcho

Honcho: a python clone of Foreman. For managing Procfile-based applications.

jobrunner

Job runner with logging

jtag_vpi

TCP/IP controlled VPI JTAG Interface.

logic

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

noxim

Network on Chip Simulator

PeakRDL-regblock

Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

pypyr

pypyr task-runner cli & api for automation pipelines. Automate anything by combining commands, different scripts in different languages & applications into one pipeline process.

RALBot-gen

Uset systemRDL to generate UVM regmodel or Verilog C use header files

snake-game

A snake game simulation

SVA-AXI4-FVIP

YosysHQ SVA AXI Properties

systemctlm-cosim-demo

UVM-1

UVM examples and projects

vimrc

The ultimate Vim configuration: vimrc

yamm

YAMM package repository

YASA_tui

A simple tui based on Textualize/textual which can show user regression cmd history and regression testcases status