Jiang Shizhi's starred repositories
arm-gem5-rsk
Official repository of the Arm Research Starter Kit on System Modeling using gem5
e200_opensource
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
cache-model
A behavioural cache model for analysing the cache behaviour under side-channel attack.
rocket-chip
Rocket Chip Generator
awesome-cpp
A curated list of awesome C++ (or C) frameworks, libraries, resources, and shiny things. Inspired by awesome-... stuff.