Yuhei Horibe's repositories
dotfiles
My dotfiles.
zed_synth_snd_drv
ALSA machine driver for synthesizer module on Zedboard.
synthesizer
Verilog source code for digital synthesizer project.
synth_module_test
Test program/driver for synthesizer module on Zedboard.
zed_uio_dev_drv
Device driver for my Zedboard PL module (UIO style).
Zedboard_audio_driver
Zedboard audio device driver (combination of Xilinx I2S transmitter, I2S receiver and ADAU1761 CODEC).
uio_dev_test
User program to test Zedboard UIO device.
verilog_adder
Basic calculation circuit (verilog).
SocketProgramming
Basic socket programming
AXI_Bus_Sim
System verilog simulation for AXI module.
OVM_Simulation
PWM unit test bench using OVM library
clock-divider
It divides the clock into 1 / (2 * (1 + div_cnt)).
PWM_module
Simple PWM module written in Verilog, and simulation sources written in SystemVerilog
ZedboardDevelFirst
Hardware design (IP only), Linux device driver and Linux application for Zedboard development.
GrovePi_LCD_Driver
Device driver for Grove Pi color LCD
KernelModuleTest
First Linux Kernel module.
AVL_Tree
Implementation of AVL Tree structure.
GrovePi_PWM
PWM output test via GrovePi
DataCompression
Implementation of Huffman coding.
RPi_RailModelCtl
Rail model controller using Raspberry Pi (Remote Controled Version).
EnglishVocabularyLearner
Learning assistant program for English Vocabulary.
AutomaticTimeTableGenerator
Implementation of Genetic Algorithm for Automatic Time Table Generation.
SoundEffector
Implementation of Audio Effector on Windows.
SimultaneousEquation
Implementation of Solver of simultaneous equation.
Clustering
Implementation of clustering Algorithm.
sort_algorithm
Implementation of Shell Sort and Quick Sort.
MapEditor
Graphic Editor for Game Programming.