Yeonan Ha's repositories
timeloop
Timeloop performs modeling, mapping and code-generation for Tensor Algebra workloads running on Explicitly-Decoupled Data Orchestration (EDDO) architectures.
tapa
TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerators.
verilog-axi
Verilog AXI components for FPGA implementation
corundum
Open source FPGA-based NIC and platform for in-network compute
IoT-For-Beginners
12 Weeks, 24 Lessons, IoT for All!
firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
UVVM
UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
cuda-gdb
CUDA GDB
open-gpu-kernel-modules
NVIDIA Linux open GPU kernel module source
ml_perf_model
ML performance model for GPU training of DLRM and more.
INFaaS
Model-less Inference Serving
qemu
Official QEMU mirror. Please see http://wiki.qemu.org/Contribute/SubmitAPatch for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
onnxruntime
ONNX Runtime: cross-platform, high performance ML inferencing and training accelerator
dsa-framework
Release of stream-specialization software/hardware stack.
tvm
Open deep learning compiler stack for cpu, gpu and specialized accelerators
genie
A quick way into a systemd "bottle" for WSL
DeepSpeed
DeepSpeed is a deep learning optimization library that makes distributed training and inference easy, efficient, and effective.
onnx-mlir
Representation and Reference Lowering of ONNX Models in MLIR Compiler Infrastructure
SC_artifacts_eval
SC'22 Artifacts Evaluation
sort-google-scholar
Sorting Google Scholar search results based on the number of citations
osdi-paper196-ae
Artifact for OSDI 22 Paper: Design and Verification of the Arm Confidential Compute Architecture
hart-software-services
PolarFire SoC hart software services
maestro
An analytical cost model evaluating DNN mappings (dataflows and tiling).
pigasus
100Gbps Intrusion Detection and Prevention System
test-tlb
Stupid memory latency and TLB tester
ReGraph
Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines