Xilinx University Program's repositories
FPGA-Design-Flow-using-Vivado
This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
Zynq-Design-using-Vivado
This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
Embedded-System-Design-Flow-on-Zynq
Updated version of the XUP Workshops
ZedBoard-Final-System-Design
Open Hardware 2015: RUB; Complete System Design with both IP core implemented
finance.americanoption.zynq.hls
Open Hardware 2015: TU Kaiserslautern; American Option Pricing on Zynq
finance.zynqpricer.hls
Open Hardware 2015: TU Kaiserslautern; Heston implementation for Zynq with Vivado HLS