Beast code in Giters

Bo- Cheng, Wei's repositories

How-to-make-16-bit-adder-in-Verilog

How to make 16-bit adder in Verilog #VLSI #Verilog

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advanced-hanoi-tower

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cpython

The Python programming language

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Dice

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dithering

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Easy-job

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final_data

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hw2_ezjob

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img

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learn-script

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new

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package_auto_upgrade

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PUF_temperature

used in puf analysis

Language:Python000

pyscript

Language:Python000

ResponsiveSlides.js

Simple & lightweight responsive slider plugin (in 1kb)

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single-cycle-cpu

Language:SystemVerilog000

StockCrawler

Language:Python020

test2

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Tkinter-By-Example

Learn Tkinter By Example - a free book

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tutorials

机器学习相关教程

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web_blocker

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xitorzx.github.io

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