xiejiadiwu's repositories
axi-uvm
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Language:SystemVerilogNOASSERTION000
ms-van3t
A multi-stack, ETSI compliant, V2X framework for ns-3.
Language:C++GPL-2.0000
Practical-UVM-Step-By-Step
This is the main repository for all the examples for the book Practical UVM
Language:VerilogNOASSERTION000
tensorflow2_tutorials_chinese
tensorflow2中文教程，持续更新(当前版本:tensorflow2.0)，tag: tensorflow 2.0 tutorials
Language:Jupyter Notebook000
tvip-axi
AMBA AXI VIP
Language:SystemVerilogApache-2.0000
uvmprimer
Contains the code examples from The UVM Primer Book sorted by chapters.
Language:SystemVerilog000
xiejiadiwu
Config files for my GitHub profile.