wxbbuaa2011's repositories
LLMPerf-for-TiledArch
Analytical Performance Model for Tiled Accelerators/Dies in Spatial Architecture Running Large Language Models (LLMs)
openfhe-development
This is the development repository for the OpenFHE library. The current (stable) version is v1.1.2 (released on December 16, 2023).
acceltran
[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
Awesome-LLM
Awesome-LLM: a curated list of Large Language Model
caliptra-rtl
HW Design Collateral for Caliptra RoT IP
DeFiNES
A framework for fast exploration of the depth-first scheduling space for DNN accelerators
DyNAS-T
Dynamic Neural Architecture Search Toolkit
Edge-MoE
Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts
Efficient-LLMs-Survey
Efficient Large Language Models: A Survey
FlexGen
Running large language models like OPT-175B/GPT-3 on a single GPU. Focusing on high-throughput large-batch generation.
FPGA-Gzip-compressor
FPGA-based GZIP (deflate) compressor. Input raw data and output standard GZIP format (as known as .gz file format). 基于 FPGA 的流式 GZIP 压缩器。输入原始数据，输出标准的 GZIP 格式，即常见的 .gz / .tar.gz 文件的格式。
free
翻墙、免费翻墙、免费科学上网、免费节点、免费梯子、免费ss/v2ray/trojan节点、蓝灯、谷歌商店、翻墙梯子
FREE-TPU-V3plus-for-FPGA
FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
llm-cost-estimator
Estimating hardware and cloud costs of LLMs and transformer projects
LLM-Viewer
Analyze the inference of Large Language Models (LLMs). Analyze aspects like computation, storage, transmission, and hardware roofline model in a user-friendly interface.
LLMRoofline
Compare different hardware platforms via the Roofline Model for LLM inference tasks.
LLMSys-PaperList
LLM Systems Paper List
Microsoft-Activation-Scripts
A Windows and Office activator using HWID / KMS38 / Online KMS activation methods, with a focus on open-source code and fewer antivirus detections.
monocle-micropython
Micropython ported to the Monocle
nnsmith
Automatic DNN generation for fuzzing and more.
OpenSpike
Fully opensource spiking neural network accelerator
SparseTIR
SparseTIR: Sparse Tensor Compiler for Deep Learning
Systolic-array-implementation-in-RTL-for-TPU
IC implementation of Systolic Array for TPU
tapa
TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerators.
tinyODIN
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
wildnav
GNSS-Free drone navigation and localization in the wild