NTHU EE4292 IC Design Laboratory (ICLab)
| # |
Content |
| lab01 |
Workstation |
| lab02 |
NC-Verlilog |
| lab03 |
Testbench Debugging and Writing |
| lab04 |
Verdi & Finite State Machine |
| lab05 |
RTL Simulation and Debugging |
| lab06 |
Coding for synthesis and optimization |
| lab07 |
Line-based Image Processing |
| lab08 |
Coding for Synthesis |
| lab09 |
Conformal check with LEC & ECO-Integer Division |
| lab10 |
APR Flow with IC Compiler (Design Setup and Floorplan) |
| lab11 |
APR Flow with IC Compiler (Powerplan and Placement) |
| lab12 |
APR Flow with IC Compiler
(CTS, Routing, Verification and Power Analysis) |
| # |
Content |
| HW1 |
Three-input Raster Operations (ROP3) for Computer Graphics |
| HW2 |
Enigma |
| HW3 |
Logic Synthesis for Enigma |
| HW3.1 |
Logic Synthesis for ROP3 |
| HW4 |
QR Code Decoder with Error Correction |
| HW5 |
Digit classification using CNN |
Implement Edge Detection on Images using HOG Algorithm with Some Noise Filters