wp-17

proxy-ns

Run programs in a network namespace where all traffic go through proxy

ukf

Unscented Kalman Filter library for state and parameter estimation

mini-rv32ima

A tiny C header-only risc-v emulator.

jyyslide-md

使用Markdown制作和蒋炎岩老师幻灯片同一主题的Web幻灯片框架(Base on Reveal.js)

UberDDR3

Opensource DDR3 Controller

tiny-gpu

A minimal GPU design in Verilog to learn how GPUs work from the ground up

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

ML-Foundation-and-ML-Techniques

台大机器学习课程作业详解

cs-self-learning

计算机自学指南

advanced-computer-architecture

体系结构研讨 + ysyx高阶大纲 (WIP

Adlik

Adlik: Toolkit for Accelerating Deep Learning Inference

dsptools

A Library of Chisel3 Tools for Digital Signal Processing

interview

Resources to crack the next coding interview

Generic-Cache-Module

适用于龙芯杯团队赛入门选手的应急cache模块

awesome-ISP

A curated list of awesome ISP frameworks, papers, libraries, resources, and shiny things.

Docker-OSX

Run macOS VM in a Docker! Run near native OSX-KVM in Docker! X11 Forwarding! CI/CD for OS X Security Research! Docker mac Containers.

configs

My configuration files

chiseltest

The batteries-included testing and formal verification library for Chisel-based RTL designs.

chisel-template

A template project for beginning new Chisel work

lazy.nvim

💤 A modern plugin manager for Neovim

tmux-config

:green_book: Example tmux configuration - screen + vim key-bindings, system stat, cpu load bar.

Ynvim

yewpo's nvim configures

chisel-playground

scala3-mill-example-project

iDMA

A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

openip-hdl

Open IP in Hardware Description Language.

riscv-vector

Vector Acceleration IP core for RISC-V*

SVA-AXI4-FVIP

YosysHQ SVA AXI Properties

zhdmi

A complete HDMI transmitter implementation in VHDL

tvip-axi

AMBA AXI VIP