vivozhang / General-Zynq

A general-design version of zynq

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General-design of zynq

实验环境:Vivado2014.4
实验板卡:ZYBO

Getting Start with ZYBO 文件夹中包含对本工程的详细文本介绍。
  • 首先在VIVADO下搭建硬件工程

  • 打开vivado2014.4在tcl窗口下输入以下命令 :
  • cd 'your path'/hardware_prj
  • source ./system_pro.tcl
  • 等待bit生成完毕
  • 至此,硬件工程搭建完毕!

请根据不同的需求,分别进入到standalone_user或linux_user目录中...


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A general-design version of zynq


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Language:VHDL 92.6%Language:Verilog 3.2%Language:C 2.6%Language:Tcl 1.2%Language:Batchfile 0.3%Language:Makefile 0.1%Language:C++ 0.0%Language:Shell 0.0%Language:Python 0.0%