very3b's repositories
2019icprojects
IC design project for under-gradutes sustech
A-to-Z-Resources-for-Students
Curated list of resources for college students
ac_pdk
A C
Analog-Design-Modelling
Analog Hardware Hands on Design Labs and Modelling using SPICE Tools (NI Multisim, LTSpice)
basic_verilog
Must-have verilog systemverilog modules
Comp_lock_adpll
Computationally locked PLL : verilog codes
FPGA-Adaptive-Beamforming-and-Radar-Examples
This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are provided to showcase high-level simulation and HDL designs of various radar and array processing algorithms.
jd_maotai_seckill
优化版本的京东茅台抢购神器
js-ipfs-api
A client library for the IPFS HTTP API, implemented in JavaScript.
OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow
OpenROAD-flow
OpenROAD's top level repo pointing to stable binaries, code, sample designs and an example flow
pdkg
python generator for design kit
plutosdr-fw
PlutoSDR Firmware
Qcodes
Modular data acquisition framework
rfsoc_qpsk
PYNQ example of using the RFSoC as a QPSK transceiver.
rfsoc_sam
RFSoC Spectrum Analyser Module on PYNQ.
transferlearning-tutorial
《迁移学习简明手册》
unlimited-landeng-for-win
无限流量灯，你懂的，我不解释
verilog-ethernet
Verilog Ethernet components
VHDL-JESD204b
JESD204b modules in VHDL
you-get
:arrow_double_down: Dumb downloader that scrapes the web