E2E design and implementation of 16-bit Harvard-architecture CPU using VHDL. Please see the PPT for a TLDR of the project, and the PDF report for a full explanation of the CPU and its functionality. The CPU is Turning-complete; example supported commands:
- LDI (immediate load)
- ADD (add 2 values, write to register)
- STORE (write register value to memory)
- LOAD (read from memory to register)
- BRZ (conditional branch)
- JMP (jump back to a previous instruction)
This was a labor of love, and I learned a ton in the process.
Example computation
CPU Diagram
