troyguo

awesome-dv

Awesome ASIC design verification

dvcon_download

Download proccedings from DVCon

Penglai-SagittaVerificationPlatform

Sagitta_verification_platform from Penglai

util-linux

backup upstream repository

antikernel-ipcores

FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations

ARM_documents

Documents for ARM

AutoSVA

AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made in the signal declaration section of an RTL module, generate liveness properties so that the module would eventually make forward progress.

awesome-opensource-hardware

List of awesome open source hardware projects

baremetal-arm

An ebook about bare-metal programming for ARM

basic_verilog

Must-have verilog systemverilog modules

C

Collection of various algorithms in mathematics, machine learning, computer science, physics, etc implemented in C for educational purposes.

cpplinks

A categorized list of C++ resources.

open_source_ISP

opencores-scraper

few python scripts to clone all IP cores from opencores.org

pcie-model

pcie5_phy

PCIE 5.0 Graduation project (Verification Team) under supervision of Mentor Graphics

raspberry-pi-os

Learning operating system development using Linux kernel and Raspberry Pi

rv64x-base

Open source GPU extension for RISC-V

rvfpga_repo

SCALE-Sim

SimpleCPU

An open source CPU design and verification platform for academia

skybox

Vortex Graphics

sv_waveterm

tlm2-interfaces

contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols

verify_practice

wechat public account verify_practice codebase

VeriGPU

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

vicuna

RISC-V Zve32x Vector Coprocessor

vortex

vortex_tutorials

wav-lpddr-hw

Wavious DDR (WDDR) Physical interface (PHY) Hardware