Organization data from Github https://github.com/triSYCL
GitHub:@triSYCL
Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Experimental path tracing with C++20 and SYCL
Clang versions of triSYCL device compiler in branches `sycl/
LLVM versions of triSYCL device compiler are in branches "sycl/..."
SYCL SC wrapper on top of SYCL to experiment with possible SYCL SC concepts
Xilinx Run Time for FPGA