Tirumal Naidu (tirumalnaidu)

tirumalnaidu

Geek Repo

Company:SandLogic

Location:India

Home Page:linkedin.com/in/tirumalnaidu

Github PK Tool:Github PK Tool

Tirumal Naidu's repositories

opencl-hls-cnn-accelerator

OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.

Language:CLicense:GPL-3.0Stargazers:69Issues:5Issues:1

Oximetry-FFT

SpO2 and Heart Beat Measurement of PPG Data using Fast Fourier Transform

Language:MATLABStargazers:4Issues:1Issues:0

uvm-i2c-controller

UVM Verification of i2c Master Core Wishbone Specification

Language:VerilogStargazers:2Issues:1Issues:0

pipelined-mips-uvm

System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment

Language:VerilogStargazers:1Issues:1Issues:0

basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

Language:VerilogLicense:NOASSERTIONStargazers:0Issues:0Issues:0

buffets

Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.

Language:VerilogStargazers:0Issues:0Issues:0

csi-nn2

An optimized neural network operator library for chips base on Xuantie CPU.

Language:CLicense:Apache-2.0Stargazers:0Issues:0Issues:0
Language:HTMLLicense:Apache-2.0Stargazers:0Issues:0Issues:0
Language:SystemVerilogStargazers:0Issues:0Issues:0

FPGADesignElements

A self-contained online book containing a library of FPGA design modules and related coding/design guides.

Language:HTMLLicense:MITStargazers:0Issues:0Issues:0

gemmini

Berkeley's Systolic Array Generator

Language:ScalaLicense:NOASSERTIONStargazers:0Issues:0Issues:0

Hadware_Convolutional-Module

Hardware implementation of a configurable Convolutional Module.

Language:VerilogStargazers:0Issues:0Issues:0

hardware-multiplier-architectures

Verilog implementations of 6 different hardware multiplier architectures

Language:VerilogStargazers:0Issues:0Issues:0

MAERI_bsv

MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)

License:MITStargazers:0Issues:0Issues:0

nncase

Open deep learning compiler stack for Kendryte K210 AI accelerator

Language:C++License:Apache-2.0Stargazers:0Issues:0Issues:0

nvdla-sw

NVDLA SW

License:NOASSERTIONStargazers:0Issues:0Issues:0
Language:C++License:BSD-3-ClauseStargazers:0Issues:0Issues:0
Language:C++Stargazers:0Issues:0Issues:0

open-gpu-kernel-modules

NVIDIA Linux open GPU kernel module source

License:NOASSERTIONStargazers:0Issues:0Issues:0

openc910

OpenXuantie - OpenC910 Core

Language:VerilogLicense:Apache-2.0Stargazers:0Issues:0Issues:0
Language:SystemVerilogStargazers:0Issues:0Issues:0

rachitnigam.com

Rachit Nigam's personal website.

License:MITStargazers:0Issues:0Issues:0

RayTracing-OSHW

A dedicated graphical processor for ray tracing

Stargazers:0Issues:0Issues:0

Tengine

Tengine is a lite, high performance, modular inference engine for embedded device

Language:C++License:Apache-2.0Stargazers:0Issues:0Issues:0
Stargazers:0Issues:0Issues:0
Stargazers:0Issues:1Issues:0

tpu-mlir

Machine learning compiler based on MLIR for Sophgo TPU.

Language:C++License:Apache-2.0Stargazers:0Issues:0Issues:0
Language:PythonStargazers:0Issues:0Issues:0
Language:VerilogLicense:BSD-3-ClauseStargazers:0Issues:0Issues:0

wav-lpddr-hw

Wavious DDR (WDDR) Physical interface (PHY) Hardware

Language:SystemVerilogLicense:Apache-2.0Stargazers:0Issues:0Issues:0