2-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.
Pad size was shrinked due to clearance requirements.
PL JTAG & bitstream downloading, 640x480 VGA, BTN/LED, All GPIO pins
PS, SD Card, PL UART, SDRAM
JTAG at 30 MHz seems not stable
2-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.
2-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.
Pad size was shrinked due to clearance requirements.
PL JTAG & bitstream downloading, 640x480 VGA, BTN/LED, All GPIO pins
PS, SD Card, PL UART, SDRAM
JTAG at 30 MHz seems not stable
2-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.
GNU General Public License v3.0