SysGen and iprepo HDL out of sync
cramsay opened this issue · comments
Craig Ramsay commented
Fix in PR#1 (#1) has been applied to generated HDL only.
Can someone with SysGen access update the data inspector for the last rx "tap off"? FIFO depth should be 127, and the constant for the read threshold should be 63.
Josh Goldsmith commented
Currently, the system generator model produces a broken IP. It is being worked on.
Craig Ramsay commented
Fixed by PR #11