Craig Ramsay's repositories
Audio-Lab-PYNQ
A playground for audio DSP (and guitar effects) in PYNQ
zynqmp_xen_demo
A quick demo showing off Xen on the Zynq Ultrascale+.
PYNQ_Bootcamp
PYNQ Bootcamp 2019 teaching materials.
arduino-apple-remote
An arduino sketch for a replacement apple remote
clash-compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
clash-prelude
CLaSH prelude library containing datatypes and functions for circuit design
FloppyClock
An Arduino based alarm clock system which plays parsed midi files on a stack of floppy drives.
Idris-dev
A Dependently Typed Functional Programming Language
MusicIndexer
A java app to suggest albums you may have missed from the artists you have on your computer.
netlistsvg
draws an SVG schematic from a JSON netlist
papilio_4-7seg_driver
A driver for 4 7-segment display digits in VHDL targeted for the Papiilio One FPGA dev kit.
papilio_audio_player
A wav audio player system-on-a-chip using a Papilio one board and ZPUino core
PYNQ_RFSOC_Workshop
Open-sourcing the PYNQ & RFSoC lab materials from WWSC 2019.
Reduceron
FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.
retroclash-lib
Library code for upcoming RetroClash book
sysgen2pynq
System Generator templates/models for designing IP for PYNQ.
ZCU111-PYNQ
Board files to build the ZCU111 PYNQ image