Steve G's repositories
source_to_inst
This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in their design.
Project_Kirov
Autonomous Blimp/Zeppelin for Sparkfun AVC
DiceMaiden
Dice bot for Discord
Language:RubyApache-2.0000
qt-gstreamer
Deprecated Qt bindings for GStreamer.
Language:C++LGPL-2.1000