ss2783

chisel-pymtl-template

A template project for beginning new Chisel and PyMTL work

boom-template

A template for building new projects/platforms using the BOOM core.

chisel-template

A template project for beginning new Chisel work

cslrg

schedule for a reading group in the Computer Systems Laboratory at Cornell

dromajo

RISC-V RV64GC emulator designed for RTL co-simulation

firrtl

Flexible Intermediate Representation for RTL

gdb-python

Random collection of gdb-python scripts for debugging C/C++ programs

icenet

Network components (NIC, Switch) for FireBox

llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

llvm-tutor

A collection of out-of-tree LLVM passes for teaching and learning

riscv-boom

Berkeley Out-of-Order Machine

riscv-fesvr

RISC-V Frontend Server

riscv-tools

RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)

rocket-chip

Rocket Chip Generator

sifive-blocks

Common RTL blocks used in SiFive's projects

testchipip