sroy729's repositories
avsdmux4x1_3v3
Various applications of Analog Multiplexer using transmission gates is simulated using LTspice in 180nm TSMC library.
Awesome-Embedded
A curated list of awesome embedded programming.
bigger-fish
Code for the paper “There’s Always a Bigger Fish”
ChampSim
ChampSim repository
fingerprint
website to process fingerprint
matplotlib-cpp
Extremely simple yet powerful header-only C++ plotting library built on the popular matplotlib
openlane_sky130
repository for openlane workshop
protocentral_max86150_ecg_ppg
ProtoCentral MAX86150 PPG and ECG chip breakout board Arduino libraries and Hardware
risc-v-core
This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover
SoC-CNN-lytical
Assignments completed under SoC
VSD-IAT-Workshop-Github-Repos
GitHub is the new Resume for VLSI industry GitHub is indeed the new RESUME for VLSI industry. Really, if you are recruiting person and looking forward to judge a new candidate for a role in company, ask for GitHub project link. Projects written on resume and projects available on GitHub by a candidate will immediately give you an idea about his/her perseverance, dedication, sincerity, productivity and amount of hard-work he/she can put inside a project.
vsd-physical-design-using-open-source-tools
The repository shows the 5 - day wrokshop for beginners using open source tools like yosys, magic, opentimer, qrouter and the purpose of this repository is to provide a complete idea about the 5 - days workshop on VLSI SoC/Physical design using open source EDA tools.
vsdbbcud4f
Bi-directional Buffer with Non-inverting CMOS input and gated Pull-down and Pull-up, Strength 4ma @ 3.3V, Normal, High noise
vsdGraphExtractor
This repository contains source code that is aimed at converting a Spice NetList to its corresponding layout.
vsdmixedsignalflow
This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools. It also discusses the steps to modify the current IP layouts inorder to ensure its acceptance by the EDA tools.
vsdsram
SRAM
vsdSRAM-1
SRAM
vsdtclpowertool
The aim of this project is to create an open source power analysis tool using TCL for estimating average switching power and leakage power. This repository work is done during EICT IITG - VSD Summer Online Internship 2020.
yuup
Minimal Mistakes GitHub Pages site starter