spetca / SAP-1

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SAP-1

SAP-1 Implementation from the book Digital Computer Electronics by Albert Malvino and from Brian Eater's 8-Bit Computer Video Series

NOTES

  • testbenches in test/ are mostly for visual checks at the moment. Not actually asserting pass/fails.
  • instruction RAM is magic ram at the moment, contents immediately available when address changes.
  • OPCODEs mirror Brian Eater's implementation and may not necessarily match the book.

TODO

  • Change all active lows to active highs, for consistency
  • create a more reasonable controller.v
  • implement halt opcode

Schematic

image

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