sparsh2706 / HDU-RISC-5-stage-8-bit

This is the Verilog Implementation for a Hazard Detectot Unit for a RISC 5-stage pipeline

HDU-RISC-5-stage-8-bit

This is the Verilog Implementation for a Hazard Detectot Unit for a RISC 5-stage pipeline

Language:Verilog 100.0%