Philip Sisa M.'s repositories
basics-graphics-music
FPGA exercise for beginners
NOASSERTION000
micro-architecture
Fifo and single cycle CPU tasks
Language:SystemVerilog000
MIRISCV
Открытое RISC-V процессорное ядро MIRISCV для образовательных целей
Language:AssemblyNOASSERTION000
RTL_Levels
SystemVerilog language by Philip Sisa M.
Language:HTMLMIT000
Language:Vim Script000
Language:VerilogApache-2.0000
Language:CGPL-3.0000
open5gs
Open5GS is a C-language Open Source implementation for 5G Core and EPC, i.e. the core network of LTE/NR network (Release-16)
AGPL-3.0000
Language:SystemVerilog000
Language:Verilog000
Scrambler
Multiplicative scrambler in chisel-lang
Language:Verilog000
Language:VHDL000
Language:Shell000
the-unix-workbench
:house_with_garden: A Book for Anyone to Get Started with Unix
Language:CSSCC0-1.0000
safaricom-alarms
Raspberry p1 4 based system for GSM site
Language:Rust000