sina1989's repositories
AES-VHDL
VHDL Implementation of AES Algorithm
GPL-3.0000
Vitis_Libraries
Vitis Libraries
Apache-2.0000
Vitis-AI
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
Apache-2.0000
samplecode
This repository contains sample code for different Numato Lab products
000
PYNQ-DL
Xilinx Deep Learning IP
BSD-3-Clause000
AES-256-VHDL
Vivado project of AES 256 implementation
000
Language:C000
DCor
Deep Correlations for Texture Synthesis
Language:MatlabBSD-3-Clause000
gcm
AES-GCM Implementation in VHDL
GPL-3.0000
AES-256-Bit-Encryption-Algorithm
VHDL design of AES-256 bit encryption algorithm with 6 button push authentication, implemented on spartan 6 FPGA
000
AltiumLibrary
Library of Components, Footprints, and Tutorials for Altium
000