Shuvagata Saha's repositories
aes
Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
Language:VerilogBSD-2-Clause000
Language:C000
neorv32
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Language:VHDLBSD-3-Clause000
opentitan
OpenTitan: Open source silicon root of trust
Language:SystemVerilogApache-2.0000