shlpu / ACEC_benchmarks

Arithmetic multiplier benchmarks

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## This repo includes a collection of arithmetic multiplier benchmarks. 
These benchmarks have been used in the recent works of formal verification of arithmetic circuits. 
Please contact Cunxi Yu (cunxi.yu@epfl.ch) if you have questions or bugs.

BENCHMARKS:
\benchmark_multipliers:
	a) bp-xx-xx, sp-xx-xx are AOKI multipliers originally developed by authors in [1], used for evaluation in [2][3][5][6].
		bp: booth partial products
		wt: wallace-tree
		cl: carry-look-ahead
		rc: ripple carry
		..(for details see [1][2])
	b) mult-abc-xx are generated with ABC using "gen -N -m" commmand used in [4][5]
	c) mult-abc-Booth-xx are generated with ABC using "%blast -b" command, used in [5].
	d) btor-xx are multipliers synthesized by Boolector, provided in [6].

Notes:
XX-dc2: optimized by "dc2" flow by ABC.
XX-resyn3: optimized by "resyn3" flow by ABC.

[1] N. Homma, Y. Watanabe, T. Aoki, and T. Higuchi, “Formal design of arithmetic circuits based on arithmetic description language,” 
IEICE transactions on fundamentals of electronics, communications and com- puter sciences, vol. 89, no. 12, pp. 3500–3509, 2006.
[2] A. Sayed-Ahmed, D. Große, U. Ku ̈hne, M. Soeken, and R. Drechsler, “Formal Verification of Integer Multipliers by Combining Grobner Basis with Logic Reduction,” 
in DATE’16, 2016, pp. 1–6.
[3] Maciej Ciesielski, Cunxi Yu, Walter Brown, Duo Liu and Andre Rossi. Verification of Gate-level Arithmetic Circuits by Function Extraction.
IEEE/ACM 52nd Design Automation Conference (DAC). June, 2015, San Francisco, CA, USA.
[4] Cunxi Yu, Walter Brown, Duo Liu, Andre Rossi , Maciej Ciesielski. Formal Verification of Arithmetic Circuits by Function Extraction.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. (TCAD'16)
[5] Cunxi Yu, Maciej Ciesielski and Alan Mishchenko. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD'18)
[6] D. Ritirc, A. Biere, and M. Kauers, “Column-Wise Verification of Multipliers Using Computer Algebra,” 
in FMCAD 2017, Oct 2017 (to appear).



Best regards,
Cunxi Yu
EPFL, University of Massachusetts Amherst
cunxi.yu@epfl.ch, ycunxi@umass.edu

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Arithmetic multiplier benchmarks