Shivam Potdar's repositories
quantum-computing-course
Course Material for the Quantum Computing Course by QuLabs@IIT-R
warp-v
WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
black-parrot
A Linux-capable host multicore for and by the world
blamer-vs
đź“ť A VS Code extension to visually blame SVN-stored code line-by-line
Cache-Memory-Hog
Cache and main memory hog programs. These are programs with specific access patterns to evict the already existing cache blocks of various applications. These programs were designed to demonstrate that application performance is nearly linearly correlated with cache access rate (as shown in Section 3.1 of Subramanian et al. "The Application Slowdown Model" @ https://users.ece.cmu.edu/~omutlu/pub/application-slowdown-model_micro15.pdf)
cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
fossi-foundation.github.io
FOSSi Foundation Website
GitHubGraduation-2021
Join the GitHub Graduation Yearbook and "walk the stage" on June 5.
hypermapper
Black-box Optimizer based on Bayesian Optimization
jekyll-theme-chirpy
A minimal, sidebar, responsive web design Jekyll theme, focusing on text presentation.
linux
Linux kernel source tree
notion-font-fira-code
Simple Chrome Extension to Change the Basic Font in Notion to Fira Code
openpiton
The OpenPiton Platform
oshcamp-2019-workshop
Materials for the OSHCamp 2019 workshop - Customising RI5CY: an open-source RISC-V core
pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
RISC-V_MYTH_Workshop
Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for Me in Thirty Hours" Workshop
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
riscv-perf-model
Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
shivampotdar
profile readme
shivampotdar.github.io
A beautiful Jekyll theme for academics