Feng Shi's repositories
smart-feng
🚀⚡️ Blazing fast blog built with Gatsby and Cosmic JS 🔥
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
abseil-cpp
Abseil Common Libraries (C++)
amx
Apple AMX Instruction Set
ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
awesome-ai4eda
Awesome Artificial Intelligence for Electronic Design Automation Papers.
awesome-cpp
A curated list of awesome C++ (or C) frameworks, libraries, resources, and shiny things. Inspired by awesome-... stuff.
binarySpGemm
An MPI+OpenMP hybrid implementation of Gustavson's Sparse Matrix Multiplication for Boolean CSR matrices
clash-free
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codon
A high-performance, zero-overhead, extensible Python compiler using LLVM
CppBooks
A comprehensive catalog of modern and classic books on C++ programming language
d3-hwschematic
D3.js and ELK based schematic visualizer
kitty
C++ truth table library
kokkos
Kokkos C++ Performance Portability Programming EcoSystem: The Programming Model - Parallel Execution and Memory Abstraction
ligra
Ligra: A Lightweight Graph Processing Framework for Shared Memory
livehd
Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
memorypool
Thread safe, lock-free memory pool.
mockturtle
C++ logic network library
netlistsvg
draws an SVG schematic from a JSON netlist
OpenTimer
A High-performance Timing Analysis Tool for VLSI Systems
ParaFROST
A Parallel SAT Solver with GPU Accelerated Inprocessing
procyon
Procyon is the brightest star in the constellation of Canis Minor. But it's also the name of my RISC-V out-of-order processor.
Rift2Core
Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
RiftCore
RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System
riscv-vector-intel-labs
Vector Acceleration IP core for RISC-V*
thread-pool
BS::thread_pool: a fast, lightweight, and easy-to-use C++17 thread pool library
vlsiffra
Create fast and efficient standard cell based adders, multipliers and multiply-adders.
xyce
The Xyce™ Parallel Electronic Simulator